Advances in Computers Power-Efficient Network-on-Chips: Design and Evaluation 2022

By:

Hurson, Ali [Editor]

Contributor(s):

Sarbazi-Azad, Hamid [Editor]

Material type:

TextPublication details: US: Academic Press; 2022.Description: v.124 (xiv, 356p.)ISBN:

9780323856881

Subject(s):

Computer Science

DDC classification:

004 HUR/A

Contents:

1.Traffic-load-aware virtual channel power-gating in network-on-chips / Mohammad Sadrosadati, Amirhossein 2.Mirhosseini, Negar Akbarzadeh, Mehdi Modarressi, and Hamid Sarbazi-Azad -- 3.An efficient DVS scheme for on-chip networks / Mohammad Sadrosadati, Amirhossein Mirhosseini, Negar 4.Akbarzadeh, Homa Aghilinasab, and Hamid Sarbazi-Azad -- 5.A power-performance balanced network-on-chip for mixed CPU-GPU systems / Amir Mirhosseini, Mohammad 6.Sadrosadati, Behnaz Soltani, and Hamid Sarbazi-Azad -- 7.Routerless networks-on-chip / Fawaz Alazemi, Lizhong Chen, and Bella Bose -- 8.Routing algorithm design for power- and temperature-aware NoCs / Kun-Chih (Jimmy) Chen and Masoumeh Ebrahimi -- 9.Approximate communication for energy-efficient network-on-chip / Ling Wang and Xiaohang Wang -- 10.Power-efficient network-on-chip design by partial topology reconfiguration / Mehdi Modarressi and S. Hossein SeyyedAghaei Rezaei -- 11.The design of an energy-efficient deflection-based on-chip network / Rachata Ausavarungnirun and Onur Mutlu -- 12.Power-gating in NoCs / Hossein Farrokhbakht, Shaahin Hessabi, and N. Enright Jerger.

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Holdings
Cover image	Item type	Current library	Home library	Collection	Shelving location	Call number	Materials specified	Vol info	URL	Copy number	Status	Notes	Date due	Barcode	Item holds	Item hold queue priority	Course reserves
	Reference Books	Central Library, Sikkim University Reference		Reference Collection		004 HUR/A (Browse shelf(Opens below))					Not For Loan			051428

Total holds: 0

1.Traffic-load-aware virtual channel power-gating in network-on-chips / Mohammad Sadrosadati, Amirhossein 2.Mirhosseini, Negar Akbarzadeh, Mehdi Modarressi, and Hamid Sarbazi-Azad --
3.An efficient DVS scheme for on-chip networks / Mohammad Sadrosadati, Amirhossein Mirhosseini, Negar 4.Akbarzadeh, Homa Aghilinasab, and Hamid Sarbazi-Azad --
5.A power-performance balanced network-on-chip for mixed CPU-GPU systems / Amir Mirhosseini, Mohammad 6.Sadrosadati, Behnaz Soltani, and Hamid Sarbazi-Azad --
7.Routerless networks-on-chip / Fawaz Alazemi, Lizhong Chen, and Bella Bose --
8.Routing algorithm design for power- and temperature-aware NoCs / Kun-Chih (Jimmy) Chen and Masoumeh Ebrahimi --
9.Approximate communication for energy-efficient network-on-chip / Ling Wang and Xiaohang Wang --
10.Power-efficient network-on-chip design by partial topology reconfiguration / Mehdi Modarressi and S. Hossein SeyyedAghaei Rezaei --
11.The design of an energy-efficient deflection-based on-chip network / Rachata Ausavarungnirun and Onur Mutlu --
12.Power-gating in NoCs / Hossein Farrokhbakht, Shaahin Hessabi, and N. Enright Jerger.

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