TY  - BOOK
AU  - Hayes, John P
TI  - Computer Architecture and Organization
SN  - 0070273669 (pb)
U1  - 004.22 
PY  - 1988///
CY  - New York
PB  - McGraw-Hill
KW  - Computer architecture
KW  - Electronic Digital Computers
KW  - Design and construction
N1  - "Intended primarily as a text for computer science and electrical engineering courses at the advanced undergraduate or beginning graduate levels"--P. xiii; Computing and Computers
1.1 The Nature of Computing
1.1.1 The Elements of Computers / 1.1.2 Limitations
of Computers
1.2 The Evolution Oif Computers
1.2.1 The Mechanical Era / 1.2.2 Electronic Computers /
1.2.3 The Later Generations
IJ The VLSI Era
1.3.1 Integrated Circuits / 1.3.2 Processor Architecture /
1.3.3 System Architecture
1.4 Summary
1.5 Problems
1.6 References
Design Methodology
2.1 System Design
2.LI System Representation / 2.1.2 Design Process /
2.1.3 The Gate Level
2.2 The Register Level
2.2.1 Register-Level Components / 2.2.2 Programmable
Logic Devices / 2.2.3 Register-Level Design
2.3 The Processor Level
2.3.1 Processor-Level Components / 2.3.2 Processor-Level
Design
2.4 Summary
2.5 Problems
2.6 References
Processor Basics
3.1 CPU Organization
3.1.1 Fundamentals / 3.1.i Additional Features
3.2 Data Representation
3.2.1 Basic Formats / 3.2.2 Fixed-Point Numbers /
3.2.3 Floating-Point Numbers
3.3 Instruction Sets
3.3.1 Instruction Formats / 3.3.2 Instruction Types /
3.3.3 Programming Considerations
3.4 Summary
3.5 Problems
3.6 References
Datapath Design
4.1 Fixed-Point Arithmetic
4.1.1 Addition and Subtraction / 4.1.2 Multiplication /
4.1.3 Division
4.2 Arithmetic-Logic Units
4.2.1 Combinational ALUs / 4.2.2 Sequential ALUs
4.3 Advanced Topics
4.3.1 Floating-Point Arithmetic / 4.3.2 Pipeline Processing
4.4 Summary
4.5 Problems
4.6 References
Control Design
5.1 Basic Concepts
5.1.1 Introduction / 5.1.2 Hardwired Control /
5.1.3 Design Examples
5.2 Microprogrammed Control
5.2.1 Basic Concepts / 5.2.2 Multiplier Control Unit /
5.2.3 CPU Control Unit
5.3 Pipeline Control
5.3.1 Instruction Pipelines / 5.3.2 Pipeline Performance /
5.3.3 Superscalar Processing
5.4 Summary
5.5 Problems
5.6 References
Memory Organization
6.1 Memory Techiiology
6.1.1 Memory Device'Characteristics / 6.1.2 Random-
Access Memories / 6.1.3 SeriaUAccess Memories
6.2 Memory Systems
6.2.1 Multilevel Memories / 6.2.2 Address Translation /
6.2.3 Memory Allocation
6.3 Caches
6.3.1 Main Features / 6.3.2 Address Mapping /
6.3.3 Structure versus Performance
6.4 Summary
6.5 Problems
6.6 References
System Organization
7.1 Communication Methods
7.1.1 Basic Concepts / 7.1.2 Bus Control
7.2 10 And System Control
7.2.1 Programmed 10 / 7.2.2 DMA and Interrupts /
7.2.310 Processors / 7.2.4 Operating Systems
7.3 Parallel Processing
7.3.1 Processor-Level Parallelism / 7.3.2 Multiprocessors /
7.3.3 Fault Tolerance
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