Formatted contents note |
Chapter 0 Reader's Guide<br/>0.1 Oudine of the Book<br/>0.2 A Roadmap for Readers and Instructors<br/>0.3 Why Study Computer Organization and Architecture<br/>0.4 Internet and Web Resources<br/>PART ONE OVERVffiW<br/>Chapter 1 Introduction<br/>1.1 Organization and Architecture<br/>1.2 Structure and Function<br/>1.3 Key Terms and Review Questions<br/>Chapter 2 Computer Evolution and Performance<br/>2.1 A Brief History of Computers<br/>2.2 Designing for Performance<br/>2.3 The Evolution of the Intel x86 Architecture<br/>2.4 Embedded Systems and the ARM<br/>2.5 Performance Assessment<br/>2.6 Recommended Reading and Web Sites<br/>2.7 Key Terms, Review Questions, and Problems<br/>part TWO THE COMPUTER SYSTEM<br/>Chapter 3 ATop-LevelView of Computer Function and Interconnection<br/>3.1 Computer Components<br/>3.2 Computer Function<br/>3.3 Interconnection Structures<br/>3.4 Bus Interconnection<br/>3.5 PCI 113<br/>3.6 Recommended Reading and Web Sites<br/>3.7 Key Terms, Review Questions, and Problems<br/>Appendix 3A Timing Diagrams<br/>Chapter 4 Cache Memory<br/>4.1 Computer Memory System Overview<br/>4.2 Cache Memory Principles<br/>4.3 Elements of Cache Design<br/>4.4 Pentium 4 Cache Organization<br/>4.5 ARM Cache Organization<br/>4.6 Recommended Reading<br/>4.7 Key Terms, Review Questions, and Problems !<br/>Appendix 4A Performance Characteristics ofTwo-Level Memories<br/>Chapter 5 Internal Memory Technology<br/>5.1 Semiconductor Main Memory<br/>5.2 Error Correction<br/>5.3 Advanced DRAM Organization<br/>5.4 Recommended Reading and Web Sites<br/>5.5 Key Terms, Review Questions, and Problems<br/>Chapter 6 External Memory<br/>6.1 Magnetic Disk<br/>6.2 RAID<br/>6.3 Optical Memory<br/>6.4 Magnetic Tape<br/>6.5 Recommended Reading and Web Sites<br/>6.6 Key Terms, Review Questions, and Problems<br/>Chapter 7 Input/Output<br/>7.1 External Devices<br/>7.2 I/O Modules<br/>7.3 Programmed I/O<br/>7.4 Interrupt-Driven I/O<br/>7.5 Direct Memory Access:<br/>7.6 I/O Channels and Processors 2<br/>7.7 The External Interface: FireWire and Infiniband<br/>7.8 Recommended Reading and Web Sites<br/>7.9 Key Terms, Review Questions, and Problems<br/>Chapter 8 Operating System Support<br/>8.1 Operating System Overview<br/>8.2 Scheduling<br/>8.3 Memory Management<br/>8.4 Pentium Memory Management<br/>8.5 ARM Memory Management<br/>8.6 Recommended Reading andWeb Sites<br/>8.7 Key Terms, Review Questions, and Problems<br/>PART THREE THE CENTRAL PROCESSING UNIT<br/>Chapter 9 Computer Arithmetic<br/>9.1 The Arithmetic and Logic Unit (ALU)<br/>9.2 Integer Representation<br/>9.3 Integer Arithmetic;<br/>9.4 Floating-Point Representation<br/>9.5 Floating-Point Arithmetic<br/>9.6 Recommended Reading and Web Sites<br/>9.7 Key Terms, Review Questions, and Problems<br/>Chapter 10 Instruction Sets: Characteristics and Functions<br/>10.1 Machine Instruction Characteristics<br/>10.2 Types of Operands<br/>10.3 Intel x86 and ARM Data Types<br/>10.4 Types of Operations<br/>10.5 Intel x86 and ARM Operation Types<br/>10.6 Recommended Reading<br/>10.7 Key Terms, Review Questions, and Problems<br/>Appendix lOA Stacks<br/>Appendix lOB Little, Big, and Bi-Endian<br/>Chapter 11 Instruction Sets: Addressing Modes and Formats<br/>11.1 Addressing<br/>11.2 x86 and ARM Addressing Modes<br/>11.3 Instruction Formats<br/>11.4 x86 and ARM Instruction Formats<br/>11.5 Assembly Language<br/>11.6 Recommended Reading<br/>11.7 Key Terms, Review Questions, and Problems<br/>Chapter 12 Processor Structure and Function<br/>12.1 Processor Organization<br/>12.2 Register Organization<br/>12.3 The Instruction Cycle<br/>12.4 Instruction Pipelining<br/>12.5 The x86 Processor Family<br/>12.6 The ARM Processor<br/>12.7 Recommended Reading<br/>12.8 Key Terms, Review Questions, and Problems<br/>Chapter 13 Reduced Instruction Set Computers (RlSCs)<br/>13.1 Instruction Execution Characteristics<br/>13.2 The Use of a Large Register File<br/>13.3 Compiler-Based Register Optimization ;<br/>13.4 Reduced Instruction Set Architecture<br/>13.5 RISC Pipelining<br/>13.6 MIPS R4000<br/>13.7 SPARC '<br/>13.8 The RISC versus CISC Controversy !<br/>13.9 Recommended Reading<br/>13.10 Key Terms, Review Questions, and Problems<br/>Chapter 14 Instruction-Level Parallelism and Superscalar Processors<br/>14.1 Overview<br/>14.2 Design Issues!<br/>14.3 Pentium<br/>14.4 ARM Cortex-A8<br/>14.5 Recommended Reading<br/>14.6 Key Terms, Review Questions, and Problems<br/>PART FOUR THE CONTROL UNIT<br/>Chapter 15 Control Unit Operation<br/>15.1 Micro-operations<br/>15.2 Control of the Processor<br/>15.3 Hardwired Implementation<br/>15.4 Recommended Reading<br/>15.5 Key Terms, Review Questions, and Problems<br/>Chapter 16 Microprogrammed Control<br/>16.1 Basic Concepts<br/>16.2 Microinstruction Sequencing<br/>16.3 Microinstruction Executio'n<br/>16.4 TI 88001<br/>16.5 Recommended Reading i<br/>16.6 Key Terms, Review Questions, and Problems<br/>PART FIVE PARALLEL ORGANIZATION<br/>Chapter 17 Parallel Processing<br/>17.1 The Use of Multiple Processors<br/>17.2 Symmetric Multiprocessors<br/>17.3 Cache Coherence and the MESI Protocol<br/>17.4 Multithreading and Chip Multiprocessors<br/>17.5 Clusters 671<br/>17.6 Nonuniform Memory Access Computers<br/>17.7 Vector Computation (<br/>17.8 Recommended Reading and Web Sites<br/>17.9 Key Terms, Review Questions, and Problems<br/>Chapter 18 Multicore Computers<br/>18.1 HardwarePerformance Issues<br/>18.2 Software Performance Issues'<br/>18.3 Multicore Organization<br/>18.4 Intel x86 Multicore Organization<br/>18.5 ARMll MPCore 717<br/>18.6 Reconunended Reading and Web Sites<br/>18.7 Key Terms, Review Questions, and Problems<br/>Appendix A Projects for Teaching Computer Organization<br/>and Architecture<br/>A. 1 Interactive Simulations<br/>A.2 Research Projects'<br/>A.3 Simulation Projects /<br/>Assembly Language Projects<br/>Reading/Report Assignments<br/>A.6 Writing Assignments'<br/>A.7 Test Bank "<br/>Appendix B Assembly Language and Related Topics<br/>B.l Assembly Language'<br/>B.2 Assemblers<br/>B.3 Loading and Linking<br/>B.4 Recommended Reading and Web Sites<br/>B.5 Key Terms, Review Questions, and Problems 1<br/>ONLINE CHAPTERS<br/>WilliamStallings.eom/COA/CGASe.html<br/>Chapter 19 Number Systems<br/>19.1 The Decimal System<br/>19.2 The Binary System<br/>19.3 Converting between Binary and Decimal<br/>19.4 Hexadecimal Notation<br/>19.5 Key Terms, Review Questions, and Problems<br/>Chapter 20 Digital Logic<br/>20.1 Boolean Algebra<br/>20.2 Gates<br/>20.3 Combinational Circuits<br/>20.4 Sequential Circuits<br/>20.5 Programmable Logic Devices<br/>20.6 Recommended Reading and Web Site<br/>20.7 Key Terms and Problems<br/>Chapter 21 The IA-64 Architecture<br/>21.1 Motivation<br/>21.2 General Organization<br/>21.3 Predication, Speculation, and Software Pipelining<br/>21.4 IA-64 Instruction Set Architecture<br/>21.5 Itanium Organization<br/>21.6 Recommended Reading and Web Sites<br/>21.7 Key Terms, Review Questions, and Problems |