Computers as components: principles of embedded computing system design / (Record no. 1637)
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000 -LEADER | |
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fixed length control field | 08027cam a2200193 a 4500 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9788131217917 (pb) |
040 ## - CATALOGING SOURCE | |
Transcribing agency | CUS |
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 004.21 |
Item number | WOL/C |
100 1# - MAIN ENTRY--PERSONAL NAME | |
Personal name | Wolf, Wayne. |
245 10 - TITLE STATEMENT | |
Title | Computers as components: principles of embedded computing system design / |
Statement of responsibility, etc. | Wayne Wolf. |
246 30 - VARYING FORM OF TITLE | |
Title proper/short title | Principles of embedded computing system design |
250 ## - EDITION STATEMENT | |
Edition statement | 2nd ed. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc. | Amsterdam ; |
-- | Boston : |
Name of publisher, distributor, etc. | Elsevier ; |
Place of publication, distribution, etc. | Burlington, Mass. : |
Name of publisher, distributor, etc. | Morgan Kaufmann Publishers, |
Date of publication, distribution, etc. | 2008 |
500 ## - GENERAL NOTE | |
General note | Title from title screen. |
505 ## - FORMATTED CONTENTS NOTE | |
Formatted contents note | CHAPTER 1 Embedded Computing<br/>Introduction<br/>1.1 Complex Systems and Microprocessors<br/>1.1.1 Embedding Computers<br/>1.1.2 Characteristics of Embedded Computing<br/>Applications<br/>1.1.3 Why Use Microprocessors?<br/>1.1.4 The Physics of Software<br/>1.1.5 Challenges in Embedded Computing System<br/>Design<br/>1.1.6 Performance in Embedded Computing<br/>1.2 The Embedded System Design Process<br/>1.2.1 Requirements<br/>1.2.2 Specification<br/>1.2.3 Architecture Design .<br/>1.2.4 Designing Hardware and Software<br/>Components<br/>1.2.5 System Integration<br/>1.3 Formalisms for System Design<br/>1.3.1 Structural Description<br/>1.3.2 Behavioral Description<br/>1.4 Model Train Controller<br/>1.4.1 Requirements.<br/>1.4.2 DCC<br/>1.4.3 Conceptual Specification<br/>1.4.4 Detailed Specification<br/>1.4.5 Lessons Learned<br/>1.5 A Guided Tour of This Book .<br/>1.5.1 Chapter 2: Instruction Sets<br/>1.5.2 Chapter 3: CPUs<br/>1.5.3 Chapter 4: Bus-Based Computer Systems<br/>1.5.4 Chapter 5: Program Design and Analysis<br/>1.5.5 Chapter 6: Processes and Operating Systems<br/>1.5.6 Chapter 7: Multiprocessors<br/>1.5.7 Chapter 8: Networks<br/>1.5.8 Chapter 9: System Design Techniques<br/>CHAPTER 2 Instruction Sets<br/>CHAPTER 3<br/>Introducton..<br/>2.1 Preliminaries<br/>2.1.1 Computer Architecture Taxonomy<br/>2.1.2 Assembly Language<br/>2.2 ARM Processor<br/>2.2.1 Processor and Memory Organization<br/>2.2.2 Data Operations<br/>2.2.3 Flow of Control<br/>2.3 TI C55x DSP<br/>3.1<br/>3.2<br/>2.3.1 Processor and Memory Organization<br/>2.3.2 Addressing Modes<br/>2.3.3 Data Operations<br/>2.3.4 Flow of Control.<br/>2.3.5 C Coding Guidelines<br/>CPUs<br/>Introduction<br/>Programming Input and Output<br/>3.1.1 Input and Output Devices<br/>3.1.2 Input and Output Primitives<br/>3.1.3 Busy-Wait I/O.<br/>3.1.4 Interrupts<br/>Supervisor Mode, Exceptions, and Traps<br/>3.2.1 Supervisor Mode<br/>3.2.2 Exceptions<br/>3.2.3 Traps<br/>3.3 Co-Processors<br/>3.4 Memory System Mechanisms<br/>3.4.1 Caches<br/>3.4.2 Memory Management Units and Address<br/>Translation<br/>3.5 CPU Performance<br/>3.5.1 Pipelining<br/>3.5.2 Caching<br/>3.6 CPU Power Consumption<br/>3.7 Design Example: Data Compressor<br/>3.7.1 Requirements and Algorithm<br/>3.7.2 Specification<br/>3.7.3 Program Design<br/>3.7.4 Testing<br/>CHAPTER 4 Bus-Based Computer Systems<br/>Introduction<br/>4.1 The CPU Bus<br/>4.1.1 Bus Protocols<br/>4.1.2 DMA<br/>4.1.3 System Bus Configurations<br/>4.1.4 AMBABus<br/>4.2 Memory Devices<br/>4.2.1 Memory Device Organization<br/>4.2.2 Random-Access Memories<br/>4.2.3 Read-Only Memories<br/>4.3 I/O devices<br/>4.3.1 Timers and Counters<br/>4.3.2 A/D and D/A Converters<br/>4.3.3 Keyboards<br/>4.3.4 LEDs<br/>4.3.5 Displays<br/>4.3.6 Touchscreens<br/>4.4 Component Interfacing<br/>4.4.1 Memory Interfacing<br/>4.4.2 Device Interfacing<br/>4.5 Designing with Microprocessors<br/>4.5.1 System Architecture<br/>4.5.2 Hardware Design<br/>4.5.3 The PC as a Platform<br/>4.6 Development and Debugging<br/>4.6.1 Development Environments<br/>4.6.2 Debugging Techniques<br/>4.6.3 Debugging Challenges<br/>4.7 System-Level Performance Analysis<br/>4.7.1 System-Level Performance Analysis<br/>4.7.2 Parallelism<br/>4.8 Design Example: Alarm Clock<br/>4.8.1 Requirements<br/>4.8.2 Specification<br/>4.8.3 System Architecture<br/>4.8.4 Component Design and Testing<br/>4.8.5 System Integration andTesting<br/>CHAPTER 5 Program Design and Analysis<br/>Introduction<br/>5.1 Components for Embedded Programs<br/>5.1.1 State Machines<br/>5.1.2 Stream-Oriented Progranuning and Circular<br/>Buffers.<br/>5.1.3 Queues<br/>5.2 Models of Programs<br/>5.2.1 Data Flow Graphs<br/>5.2.2 Control/Dau Flow Graphs<br/>5.3 Assembly, Linking, and Loading<br/>5.3.1 Assemblers<br/>5.3.2 Linking<br/>5.4 Basic Compilation Techniques<br/>5.4.1 Statement Translation<br/>5.4.2 Procedures.<br/>5.4.3 Data Structures<br/>5.5 Program Optimization .<br/>5.5.1 Expression Simplification<br/>5.5.2 Dead Code Elimination<br/>5.5.3 Procedure InUning<br/>5.5.4 Loop Transformations<br/>5.5.5 Register Allocation<br/>5.5.6 Scheduling<br/>5.5.7 Instruction Selection<br/>5.5.8 Understanding and Using your Compiler<br/>5.5.9 Interpreters and JIT Compilers<br/>5.6 Program-Level Performance Analysis<br/>5.6.1 Elements of Program Perfoririance<br/>5.6.2 Measurement-Driven Performance Analysis<br/>5.7 Software Performance Optimization<br/>5.7.1 Loop Optimizations<br/>5.7.2 Performance Optimization Strategies<br/>5.8 Program-Level Energy and Power Analysis<br/>and Optimization<br/>5.9 Analysis and Optimization of Program Size<br/>5.10 Program Validation and Testing<br/>5.10.1 Clear-Box Testing<br/>5.10.2 Black-Box Testing<br/>5.10.3 Evaluating Function Tests<br/>5.11 Software Modem<br/>5.11.1 Theory of Operation and Requirements<br/>5.11.2 Specification<br/>5.11.3 System Architecture<br/>5.11.4 Component Design and Testing<br/>5.11.5 System Integration and Testing<br/>CHAPTER 6 Processes and Operating Systems<br/>Introduction<br/>6.1 Multiple Tasks and Multiple Processes<br/>6.1.1 Tasks and Processes<br/>6.1.2 Multirate Systems<br/>6.1.3 Timing Requirements on Processes<br/>6.1.4 CPU Metrics<br/>6.1.5 Process State and Scheduling<br/>6.1.6 Some Scheduling Policies<br/>6.1.7 Running Periodic Processes<br/>6.2 Preemptive Real-Time Operating Systems<br/>6.2.1 Preemption<br/>6.2.2 Priorities<br/>6.2.3 Processes and Context<br/>6.2.4 Processes and Object-Oriented Design<br/>6.3 Priority-Based Scheduling<br/>6.3.1 Rate-Monotonic Scheduling<br/>6.3.2 Earliest-Deadline-First Scheduling<br/>6.3.3 RMS vs. EDF<br/>6.3.4 A Closer Look at Our Modeling Assumptions<br/>6.4 Interprocess Communication Mechanisms<br/>6.4.1 Shared Memory Conununication<br/>6.4.2 Message Passing<br/>6.4.3 Signals<br/>6.5 Evaluating Operating System Performance<br/>6.6 Power Management and Optimization for Processes<br/>6.7 Design Example: Telephone Answering Machine<br/>6.7.1 Theory of Operation and Requirements<br/>6.7.2 Specification<br/>6.7.3 System Architecture<br/>6.7.4 Component Design and Testing<br/>6.7.5 System Integration and Testing<br/>CHAPTER 7 Multiprocessors<br/>Introduction<br/>7.1 Why Multiprocessors?<br/>7.2 CPUs and Accelerators<br/>7.2.1 System Architecture Framework<br/>7.2.2 System Integration and Debugging<br/>7.3 Multiprocessor Performance Analysis<br/>7.3.1 Accelerators and Speedup<br/>7.3.2 Performance Effects of Scheduling and Allocation<br/>7.3.3 Buffering and Performance<br/>7.4 Consumer Electronics Architecture<br/>7.4.1 Use Cases and Requirements<br/>7.4.2 Platforms and Operating Systems<br/>7.4.3 Flash File Systems<br/>7.5 Design Example: Cell Phones<br/>7.6 Design Example: Compact DISCs and DVDs<br/>7.7 Design Example: Audio Players<br/>7.8 Design Example: Digital Still Cameras<br/>7.9 Design Example: Video Accelerator<br/>7.9.1 Algorithm and Requirements<br/>7.9.2 Specification<br/>7.9.3 Architecture<br/>7.9.4 Component Design<br/>7-9.5 System Testing<br/>CHAPTER 8 Networks<br/>Introduction<br/>8.1 Distributed Embedded Architectures<br/>8.1.1 Why Distributed?<br/>8.1.2 Network Abstractions<br/>8.1.3 Hardware and Software Architectures<br/>8.1.4 Message Passing Programming<br/>8.2 Networks for Embedded Systems<br/>8.2.1 Thel^CBus<br/>8.2.2 Ethernet<br/>8.2.3 Fieldbus<br/>8.3 Network-Based Design<br/>8.4 Internet-Enabled Systems<br/>8.4.1 Internet<br/>8.4.2 Internet Applications<br/>8.4.3 Internet Security<br/>8.5 Vehicles as Networks<br/>8.5.1 Automotive Networks<br/>8.5.2 Avionics<br/>8.6 Sensor Networks<br/>8.7 Design Example: Elevator Controller<br/>8.7.1 Theory of Operation and Requirements<br/>8.7.2 Specification<br/>8.7.3 Architecture<br/>8.7.4 Testing<br/>CHAPTER 9 System Design Techniques<br/>Introduction<br/>9.1 Design Methodologies<br/>9.1.1 Why Design Methodologies?<br/>9.1.2 Design Flows<br/>9.2 Requirements Analysis<br/>Contents<br/>9.3 Specifications.<br/>9.3.1 Control-Oriented Specification Languages<br/>9.3.2 Advanced Specifications<br/>9.4 System Analysis and Architecture Design<br/>9.5 Quality Assurance<br/>9.5.1 Quality Assurance Techniques<br/>9.5.2 Verifying the Specification<br/>9.5.3 Design Reviews |
650 #0 - SUBJECT | |
Keyword | System Design. |
650 #0 - SUBJECT | |
Keyword | Embedded Computer Systems. |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | General Books |
Withdrawn status | Lost status | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Full call number | Accession number | Date last seen | Date last checked out | Koha item type |
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Central Library, Sikkim University | Central Library, Sikkim University | General Book Section | 31/05/2016 | 004.21 WOL/C | P18480 | 14/07/2018 | 14/07/2018 | General Books |