Computers as components: principles of embedded computing system design/ (Record no. 163569)

MARC details
000 -LEADER
fixed length control field 00416nam a2200145Ia 4500
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 978-0123743978
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9788131217917
040 ## - CATALOGING SOURCE
Transcribing agency CUS
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.21
Item number WOL/C
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Wolf, Wayne
245 #0 - TITLE STATEMENT
Title Computers as components: principles of embedded computing system design/
Statement of responsibility, etc. Wayne Wolf.
250 ## - EDITION STATEMENT
Edition statement 2nd ed.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc. USA:
Name of publisher, distributor, etc. Morgan Kaufmann Publishers,
Date of publication, distribution, etc. 2010.
300 ## - PHYSICAL DESCRIPTION
Extent xxiii, 507 p.
Dimensions 24 cm
505 ## - FORMATTED CONTENTS NOTE
Formatted contents note CHAPTER 1 Embedded Computing ^<br/>Introduction<br/>1.1 Complex Systems and Microprocessors<br/>1.1.1 Embedding Computers<br/>1.1.2 Characteristics of Embedded Computing ^<br/>Applications ^<br/>1.1.3 Why Use Microprocessors? ^<br/>1.1.4 The Physics of Software<br/>1.1.5 Challenges in Embedded Computing System ^<br/>Design ^<br/>1.1.6 Performance in Embedded Computmg<br/>1.2 The Embedded SystemDesign Process<br/>1.2.1 Requirements<br/>1.2.2 Specification<br/>1.2.3 Architecture Design<br/>1.2.4 Designing Hardware andSoftware<br/>Components<br/>1.2.5 SystemIntegration<br/>1.3<br/>FormaUsms for SystemDesign<br/>1.3.1 Structural Description<br/>1.3.2 Behavioral Description 27<br/>1.4 Model Train Controller 50<br/>1.4.1 Requirements —<br/>1.4.2 DCC<br/>1.4.3 Conceptual Specification 34<br/>1.4.4 Detailed Specification 37<br/>1.4.5 Lessons Learned<br/>1.5 AGuided Tour of This Book 45<br/>1.5.1 Chapter 2: Instruction Sets 46<br/>1.5.2 Chapter 3: CPUs 46<br/>1.5.3 Chapter 4: Bus-Based Computer Systems 46<br/>ii<br/>vu<br/>xvii<br/>xix<br/>xxi<br/>IX<br/>Contents<br/>1.5.4 Chapter 5; Program Design and Analysis 47<br/>1.5.5 Chapter 6:Processes and Operating Systems 48<br/>1.5.6 Chapter 7: Multiprocessors 49<br/>1.5.7 Chapter8: Networks 50<br/>1.5.8 Chapter9:System Design Techniques 50<br/>Summary 51<br/>Further Reading 5j<br/>Questions 52<br/>Lab Exercises 5^<br/><br/>CHAPTER 2 Instruction Sets 55<br/>Introducton 55<br/>2.1 Preliminaries 55<br/>2.1.1 ComputerArchitecture Taxonomy 55<br/>2.1.2 Assembly Language 58<br/>2.2 ARM Processor 59<br/>2.2.1 Processor and Memory Organization 60<br/>2.2.2 Data Operations<br/>2.2.3 Flow of Control 69<br/>2.3 TIC55XDSP 75<br/>2.3.1 Processor and Memory Organization 76<br/>2.3.2 Addressing Modes 78<br/>2.3.3 Data Operations 82<br/>2.3.4 Flowof Control 83<br/>2.3.5 C Coding Guidelines 85<br/>Summary 36<br/>Further Reading 86<br/>Questions 86<br/>Lab Exercises 89<br/><br/>CHAPTER 3 CPUs 91<br/>Introduction 91<br/>3.1 Programming Input and Output 91<br/>31.1 Input and Output Devices 92<br/>3.1.2 Input and Output Primitives 93<br/>3.1.3 Busy-Wait I/O 95<br/>3.1.4 Interrupts 96<br/>3.2 Supervisor Mode, Exceptions, andTraps 110<br/>3.2.1 Supervisor Mode Ill<br/>3.2.2 Exceptions Ill<br/>3.2.3 Traps 112<br/>3.3 Co-Processors 112<br/>3.4 Memory System Mechanisms 113<br/>3.4.1 Caches 113<br/>3.4.2 Memory Management Units and Address<br/>Translation 119<br/>3.5 CPU Performance .124<br/>3.5.1 Pipelining 124<br/>3.5.2 Caching 128<br/>3.6 CPU PowerConsumption 129<br/>3.7 Design Example: Data Compressor 134<br/>3.7.1 Requirements and Algorithm 134<br/>3.7.2 Specification 136<br/>3.7.3 Program Design 139<br/>3.7.4 Testing 145<br/>Summary 147<br/>Further Reading 147<br/>Questions 148<br/>Lab Exercises 151<br/><br/>CHAPTER 4 Bus-Based Computer Systems i53<br/>Introduction ^53<br/>4.1 The CPUBus 153<br/>4.1.1 Bus Protocols 154<br/>4.1.2 DMA 160<br/>4.1.3 System Bus Configurations 162<br/>4.1.4 AMBABus 165<br/>4.2 Memory Devices 166<br/>4.2.1 Memory Device Organization 166<br/>4.2.2 Random-AccessMemories 167<br/>4.2.3 Read-Only Memories 169<br/>4.3 I/O devices 169<br/>4.3.1 Timers and Counters 169<br/>4.3.2 A/D and D/A Converters 171<br/>4.3.3 Keyboards 171<br/>4.3.4 LEDs 173<br/>4.3.5 Displays 173<br/>4.3.6 Touchscreens 175<br/>4.4 Component Interfacing 175<br/>4.4.1 Memory Interfacing 176<br/>4.4.2 Device Interfacing 176<br/>4.5 Designing with Microprocessors 177<br/>4.5.1 SystemArchitecture 177<br/>4.5.2 Hardware Design 179<br/>4.5.3 The PC as a Platform 180<br/>Contents xi<br/>xli Contents<br/>4.6 Development and Debugging 183<br/>4.6.1 Development Environments 183<br/>4.6.2 Debugging Techniques 184<br/>4.6.3 Debugging Challenges 187<br/>4.7 System-Level Performance Analysis 189<br/>4.7.1 System-Level Performance Analysis 189<br/>4.7.2 Parallelism I94<br/>4.8 Design Example: Alarm Clock I96<br/>4.8.1 Requirements I96<br/>4.8.2 Specification 198<br/>4.8.3 System Architecture 200<br/>4.8.4 Component Design andTesting 203<br/>4.8.5 System Integration andTesting 204<br/>Summary 204<br/>Further Reading 205<br/>Questions 205<br/>Lab Exercises 207<br/><br/>CHAPTER 5 Program Design and Analysis 209<br/>Introduction 209<br/>5.1 Components for Embedded Programs 210<br/>5.1.1 State Machines 210<br/>5.1.2 Stream-Oriented Programming and Circular<br/>Buffers 212<br/>5.1.3 Queues 213<br/>5.2 Models of Programs 215<br/>5.2.1 Data Flow Graphs 215<br/>5.2.2 Control/Data Flow Graphs 217<br/>5.3 Assembly, Linking, and Loading 220<br/>5.3.1 Assemblers 222<br/>5.3.2 Linking ..; 225<br/>5.4 Basic CompilationTechniques 227<br/>5.4.1 StatementTranslation 229<br/>5.4.2 Procedures 233<br/>5.4.3 Data<br/>Structures 234<br/>5.5 Program Optimization 236<br/>5.5.1 Expression Simplification 236<br/>5.5.2 Dead Code Elimination 237<br/>5.5.3 Procedure Inlining 237<br/>5.5.4 Loop Transformations 238<br/>5.5.5 RegisterAllocation 239<br/>5.5.6 Scheduling 244<br/>5.5.7 Instruction Selection 246<br/>5.5.8 Understanding and Using your Compiler 247<br/>5.5.9 Interpreters andJIT Compilers 247<br/>5.6 Program-Level Performance Analysis 248<br/>5.6.1 Elements of Program Performance 250<br/>5.6.2 Measurement-Driven Performance Analysis 254<br/>5.7 Software Performance Optimization 257<br/>5.7.1 Loop Optimizations 257<br/>5.7.2 Performance Optimization Strategies 261<br/>5.8 Program-Level Energy and PowerAnalysis<br/>and Optimization 262<br/>5.9 Analysis and Optimization ofProgram Size 266<br/>5.10 Program Validation and Testing 267<br/>5.10.1 Clear-Box Testing 268<br/>5.10.2 Black-Box Testing 276<br/>5.10.3 Evaluating FunctionTests 277<br/>5.11 Software Modem 278<br/>5.11.1 Theory of Operation and Requirements 278<br/>5.11.2 Specification 280<br/>5.11.3 System Architecture 280<br/>5.11.4 Component Design andTesting 282<br/>5.11.5 System Integration andTesting 282<br/>Summary 282<br/>Further Reading 283<br/>Questions 283<br/>Lab Exercises 291<br/><br/>CHAPTER 6 Processes and Operating Systems 293<br/>Introduction 293<br/>6.1 Multiple Tasks and Multiple Processes 294<br/>6.1.1 Tasks and Processes 294<br/>6.1.2 Multirate Systems 296<br/>6.1.3 TimingRequirements on Processes 298<br/>6.1.4 CPU Metrics 302<br/>6.1.5 Process State and Scheduling 303<br/>6.1.6 Some Scheduling Policies 303<br/>6.1.7 Running Periodic Processes 306<br/>6.2 Preemptive Real-Time Operating Systems 308<br/>6.2.1 Preemption 308<br/>6.2.2 Priorities 309<br/>6.2.3 Processes and Context 310<br/>6.2.4 Processes and Object-Oriented Design 315<br/>6.3 Priority-Based Scheduling 316<br/>6.3.1 Rate-Monotonic Scheduling 316<br/>6.3.2 Earliest-Deadline-First Scheduling 32;0<br/>6.3.3 KMS vs. EOF 323<br/>6.3.4 ACloser Look ai Our Motlding Assumptions 324<br/>Imcrproccss Communication Mechanisms 325<br/>6.4.1 Sharccl Memory Communication 326<br/>6.4.2 Message Passing 329<br/>6.4.3 Signals 329<br/>Evaluating Openiting S)'stem Performance 330<br/>Power Management and Optimization for Processes 333<br/>Design Example: Telephone Answering Machine 336<br/>6.7.1 Theory of Operation and Requirements 336<br/>6.7.2 Specification 340<br/>6.7.3 System Architecture 342<br/>6.7.4 Component Design andTesting 344<br/>6.7.5 System Integration<br/>andTesting 345<br/>Summar)' 345<br/>Further Reading 346<br/>Questions 346<br/>Lab Exercises 352<br/>Multiprocessors 353<br/>Introduction 353<br/>Wliy Multiprocessors? 353<br/>CPUs and Accelerators 356<br/>7.2.1 System Architecture Framework 357<br/>7.2.2 System Integration and Debugging 360<br/>Multiprocessor Performance<br/>Analysis 360<br/>7.3-1 Accelerators and Speedup 360<br/>7.3.2 Performance Effects of Scheduling and Allocation ... 364<br/>7.3.3 Buffering and Performance 368<br/>Consumer Electronics Architecture 369<br/>7.4.1 Use Cases and Requirements 369<br/>7.4.2 Platforms and Operating Systems 371<br/>7.4.3 Flash File Systems 372<br/>Design Example: Cell Phones 373<br/>Design Example: Compact DISCs and DVDs 375<br/>Design Example: Audio Players 380<br/>Design Example: Digital Still Cameras 381<br/>Design Example: Video Accelerator 384<br/>7.9.1 Algorithm and Requirements 384<br/>7-9-2 Specification 388<br/>7.9.3 Architecture 388<br/>7.9.4 Component Design 390<br/>7.9.5 System Testing 392<br/>Summary 392<br/>Further Reading 393<br/>Questions 393<br/>Lab Exercises 395<br/><br/>CHAPTER 8 Networks 397<br/>Introduction 397<br/>8.1 Distributed Embedded Architectures 398<br/><br/>8.1.1 Why Distributed? 399<br/>8.1.2 Network Abstractions 399<br/>8.1.3 Hardware and Software Architectures 401<br/>8.1.4 Message Passing Programming 404<br/>Networks for Embedded Systems 405<br/>8.2.1 The CBus 406<br/>8.2.2 Ethernet 411<br/>8.2.3 Fieidbus *^13<br/>Network-Based Design 413<br/>Internet-Enabled Systems 416<br/>8.4.1 Internet 417<br/>8.4.2 Internet Applications 419<br/>8.4.3 Internet Security 421<br/>Vehiclesas Networks 421<br/>8.5.1 Automotive Networks 422<br/>8.5.2<br/>Avionics 425<br/>Sensor Networks<br/>"^26 <br/>Design Example: Elevator Controller 427<br/>8.7.1 Theory of Operation and Requirements 428<br/>8.7.2 Specification 430<br/>8.7.3 Architecture ^31<br/>8.7.4 Testing 433<br/>Summary ^^34<br/>Further Reading 434<br/>Questions 434<br/>Lab Exercises 436<br/><br/>CHAPTER 9 System Design Techniques 437<br/>Introduction 437<br/>9.1 Design Methodologies 437<br/>9.1.1 Why Design Methodologies? 437<br/>9.1.2 Design Flows 439<br/>9.2 Requirements Analysis 446<br/>Contents xv<br/>xvi Contents<br/>9.3 Specifications 447<br/>9.3.1 Control-Oriented Specification Languages 447<br/>9.3.2 Advanced Specifications 451<br/>9.4 System Analysis and Architecture Design 454<br/>9.5 Quality Assurance 457<br/>9.5.1 Quality Assurance Techniques 460<br/>9.5.2 Verifying the Specification 462<br/>9.5.3 Design Reviews 464<br/>Summary 466<br/>Further Reading 466<br/>Questions 466<br/>Lab Exercises 467<br/>APPENDIX A UML Notations 469<br/>Introduction 469<br/>A.l Primitive Elements 469<br/>A.2 DiagramTypes 469<br/>A.2.1 Class Diagram 471<br/>A.2.2 State Diagram 471<br/>A.2.3 Sequence and Collaboration Diagrams 473<br/>
650 ## - SUBJECT
Keyword Embedded computer systems
650 ## - SUBJECT
Keyword System design
651 ## - SUBJECT--GEOGRAPHIC NAME
Geographic name Embedded computer systems--Design and construction
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type General Books
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Date acquired Full call number Accession number Date last seen Koha item type
        Central Library, Sikkim University Central Library, Sikkim University 31/05/2018 004.21 WOL/C P18479 31/05/2018 General Books
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